1. Field
Embodiments relate to a semiconductor device and a controlling method thereof, and more particularly, to a semiconductor memory device in which consumption of a standby current due to an electric current path of a normal cell may be reduced by applying a voltage capable of reducing the standby current to a dummy bit line included in a memory array, and a method of reducing consumption of a standby current therein.
2. Description of the Related Art
In a semiconductor memory device, a memory array may include a dummy cell and a dummy bit line and a dummy word line connected to the dummy cell. A bit line or a word line formed in the edge portion of the memory array may not be able to maintain reliability during a semiconductor manufacturing process. Therefore, the bit or word line in the edge portion may be designated as the dummy bit line or the dummy word line. The dummy bit line or the dummy word line may be excluded from a normal operation of the semiconductor memory device.
When a normal cell is replaced with a redundant cell because of its defect, an unwanted standby current may be consumed at the current path since the original current path still exists.
More specifically, when a defective cell exists between a normal cell and a dummy cell, and thus, generate electric short-circuit, and the defective cell may be replaced with a redundancy cell. However, the current path still remains between the dummy cell and the defective cell. A standby current flowing the current path between the dummy cell and the defective cell may considerably deteriorate reliability of the semiconductor memory device.